In mobile communication systems, phase locked loops (PLLs) are widely used as frequency synthesizers to generate the “carrier frequency” used to transmit and receive broadcast signals. Generally, a frequency synthesizer PLL is composed of a phase comparator which includes a phrase frequency detector, a loop filter, a voltage controlled oscillator (VCO), and a feedback frequency divider (/N) in a feedback loop. In a closed-loop mode, the PLL continuously compares the output frequency of the VCO through the feedback loop with a reference frequency signal. When the output of the VCO moves away from the reference signal, an error voltage is generated and filtered and is used as a control signal to bring the VCO into synchronization. In order to achieve a frequency synthesizer combining multiband, multi-standard, and high performance constraints, such as area, power consumption, and noise suppression, the VCO must be capable of operating over a large frequency range on the order of a few Gigahertz. However, a problem with existing PLLs is that temperature variations within the PLL circuitry can cause VCO frequency drift. If the VCO frequency drifts beyond acceptable limits, the PLL may unlock and communication will be lost.